Every electronic system needs a timing device as a reference. In this video, we'll discuss system usage of oscillators and the various types along with reviewing key specifications and take a look at TI's solution.
This image is a sample clock tree for 128-channel ultrasound cart-based system. The LMK61E2, an oscillator, is providing the reference signal for the entire system. Oscillators are used to provide the reference clock for clock generators and jitter cleaners, which then subsequently provide the clocking of AFEs, ADCs, DACs, FEGAs, and DSPs.
In order to optimize the performance of the clock generator and jitter cleaner, the oscillator must have proper output signal format, phase noise, and jitter performance since the reference gets fanned out to the whole system. Flexibility with the oscillator frequency would also allow for any configuration changes needed on the receiver side for optimization. Different flavors of reference oscillators offer accuracy and stability.
XO is a crystal oscillator containing the crystal as well as the oscillator circuit. TCXO is temperature compensated to have low PPM across an extended temperature range. OCXO includes an oven or heater to maintain a temperature and have even lower PPM across temperature. You can also include voltage control to adjust the load, capacitance, and frequency in a VCXO or VCTCXO. Output tapes provided by the oscillator and the overall package size are other aspects to consider when making a selection. We'll get into details on what each of these specifications means.
The frequency tolerance is often the key spec for system requirements. Total frequency tolerance is the maximum frequency drift the device will observe over its full lifecycle and operating temperature range. The total should account for the three largest contributing factors, temperature range, aging, and, finally, solder reflow.
This measurement is done in PPM, Parts Per Million. The difference between the measured frequency and ideal frequency normalized and multiplied up to PPM. Typically, frequency deviation over operating temperature range plot is provided on the data sheet.
In this example, at 100 megahertz frequency, a 10 PPM stability over temperature would equate to a 1 kilohertz shift. Note that aging and solder reflow would be added on top for the total frequency tolerance. The output clock specifications are categorized much like a buffer or a clock generator.
Specifications include swing level, rise and fall time, and output duty cycle. The table here shows typical specs that you can find in any data sheet. The output swing is specified both single-ended and differential.
Rise and fall time are measured in picoseconds from 20% to 80% of the differential swing. Note that proper termination, as described in the data sheet, is necessary to meet swing, common voltage, and timing specs. CMOS, or other single ended oscillators, will have similar tables, just specified for a single entity rather than differential.
As the phase noise of the reference oscillator can propagate further down in the system, even if a jitter cleaner is used, it's important to provide good phase noise reference for the PLL in the system, especially within the PLL loop bandwidth. This means the lower offsets of 100 Hertz, 1K and 10 kilohertz are most important. The phase noise plot shows the typical performance expected at 156.25 megahertz. 90 femtoseconds jitter for an integration band of 12 kilohertz to 20 megahertz. The phase noise at 100 hertz offset is minus 115 DBC per Hertz. 1K at minus 140 and minus 144 DBC per hertz at the 10 kilohertz offset. We'll go into further details about phase noise and jitter in some of our other training modules.
A simplified circuit for crystal input is shown in this figure. Crystal is connected across the inverter input and output where r sub s is a series resistor used to reduce drive level. The active circuit inside the chip generates a positive feedback loop otherwise known as negative resistance, providing the stimulus in order for the crystal to start and maintain oscillation.
Due to the high mechanical resonance or q of the crystal, only specific frequency is allowed to oscillate, depending on the cut of the crystal. Typically, this will be in a frequency range of less than 100 megahertz with most common fundamental resonances of AT cut crystals less than 40 meg. Loading capacitance CL1 and CL2 are used to control initial frequency accuracy of the crystal.
TI's integrated oscillator includes a 50 megahertz crystal and a fractional PLL with integrated VCO and voltage regulator. The crystal load capacitance is tuned and programmed to the device's EEPROM, which allows the PLL to lock and start upon device power up. The signal output path offers an integer divider value from the VCO frequency and selectable output types, including LVDS, LV PECL, HTSL.
I2C programmability allows for updates to the EEPROM to change the startup configuration. I2C can also be used for simple register control, for example, changing the output divider value. Changing the output divider results in a different output frequency. This is known as coarse tuning ability for oscillators.
Other functionality includes an output enable pin that will hold the output in mute or high z mode until the pin is pulled high. And then the output of the oscillator would be present. Some advanced features that may be needed, depending on the system, include DCO tuning ability.
The PLL and divider numerator can be updated through I2C, which would result in very small increments or decrements in output frequency. Further details on this procedure will be provided in future Precision Labs. Thank you for joining us today to discuss the key parameters and specs for oscillators. For more information, please visit ti.com/oscillators.
[size=1em]
发表于 2021-5-14 20:01:00
